1. Field of the Invention
This invention relates to a semiconductor package particularly such as a ball grid array package to which a countermeasure for cross talk noise between signal lines is applied.
2. Related Background Art
In recent years, in the tendency of IC toward more pins and smaller size, a narrower pitch in a surface mounting package such as a shrink small out package (hereinafter abbreviated as SSOP) or a quad flat package (hereinafter abbreviated as QFP) has been advanced more and more.
Particularly, as a narrower pitch, for example, QFP of 0.5 mm is often used in handy instruments.
However, when packaging cost is taken into account, further narrowing of the pitch has become limited from various viewpoints such as a packaging apparatus, a packaging material and packaging control, and as an answer to the desire for more pins, there is adopted a method of solving without making the body size of the package larger, i.e., a pin grid array (hereinafter abbreviated as PGA) as a two-dimensional pin arrangement instead of a conventional one-dimensional pin arrangement or a ball grid array (hereinafter abbreviated as BGA). Particularly PGA, as a simple answer to the tendency toward more pins rather than its size, has utilized sockets since long ago and has often been used in the CPU, gate arrays and the like of personal computers.
Generally, PGA often handles many pins and high-speed digital signals and the package thereof is often expensive. On the other hand, BGA, unlike PGA, is a package for surface mounting at first and moreover, has a chip placed on a printed substrate or the like including a flexible printed substrate and has solder balls disposed at a relatively rough pitch in the form of a grid on the back thereof. Accordingly, in spite of the rough pitch, many pins can be secured for a package size, and relatively low-cost packaging is possible by the self position modifying effect or the so-called self alignment effect by the solder balls.
However, BGA is a planar (two-dimensional) pad arrangement and therefore, it is the premise thereof to receive it by a mother board which is a multi-layer substrate, but since highly dense pads are disposed on a narrow area, the cross talk between signals increases, and also when wiring is drawn out in the mother board, so-called cross talk which is the electrical leakage of signals is increased by the capacity coupling by the grade separation between drawn-out lines.
Also, as described above, QFP is known as the typical semiconductor package, but in recent years, with the higher density of semiconductor elements, the number of electrodes (for example, power source pins and signal pins) has also increased rapidly, and the tendency of semiconductor elements toward more pins has advanced.
On the other hand, compactness and thinness have been required of the types of machines using semiconductor elements, and the downsizing of semiconductor packages has been required to package semiconductor elements more highly density.
As the result, OMPAC (over-molded plastic array carrier) has been proposed as a new semiconductor package.
FIG. 13 of the accompanying drawings shows OMPAC. As the typical construction of OMPAC, a semiconductor element 101 is carried on a printed substrate 102, and the wiring pattern of the printed substrate 102 and the electrode portion of the semiconductor element 101 are connected together by wire bonding 103. Also, this wiring pattern is connected to the pertinent electrode land 106 of a plurality of electrode lands formed in a matrix-like form on the back side of the printed substrate 102, and further this electrode land melts a solder ball and forms the protruded electrode portion 105 of the solder ball.
Also, the upper surface portion of the semiconductor element 101 is molded by a transfer mold 104, whereby the semiconductor element 101 is hermetically sealed.
The thus constructed OMPAC permits electrodes to be formed in a matrix-like shape on the back of the substrate and therefore, providing more pins is possible even when the space between adjacent electrodes is as wide a pitch as 1.0 to 1.5 mm.
Accordingly, when this semiconductor package is to be packaged, it is not necessary to print cream solder with a minute pattern, and solder balls excellent in strength become the electrodes of the semiconductor package and therefore, this semiconductor package can be made into a semiconductor package easy to handle and having many pins. Such a semiconductor package of many pins is called BGA (ball grid array) and has become widely adopted.
As a substrate for carrying the BGA package thereon, use has in recent years been made of not only a printed substrate but also a ceramic substrate, a tape substrate or the like.
The packaging of such a BGA package is easily solder-connected to a parent substrate called a mother board, and electronic parts electrically connected to the BGA package are also mounted and disposed on the mother board proximate to this BGA package.
FIG. 14 of the accompanying drawings is a diagram showing an example of the connection between an IC chip enclosed in the BGA and additional elements around it. The reference numeral 110 designates an. MPU (micro-processing unit) which is an IC chip, the reference numeral 111 denotes a bypass capacitor connected between a power source terminal (VCC) and a GND terminal (VSS) for preventing the malfunctioning of the IC chip by the fluctuation of a power source, and the reference numerals 112 and 113 designate capacitors for a charge pump constituting a charge pump circuit, and connected between charge pump terminals CP1 and CP2 and the GND terminal (VSS) as shown, and making a voltage twice or thrice as great as a certain reference voltage which is used chiefly as a liquid crystal driving voltage.
The reference numeral 114 denotes an XTAL (crystal) oscillator for the low speed operation of the IC chip and liquid crystal drive timing, and the opposite ends of the element are connected to oscillation terminals (XTAL1 and XTAL2).
The reference numeral 115 designates a high speed oscillator, and an element of three terminals containing an oscillation capacitor therein is often used for the high speed operation of the IC chip, and this high speed oscillator is connected between oscillation terminals (XTAL3 and XTAL4) and the GND terminal (VSS).
The above-described elements 112 to 115 all constitute a high impedance circuit, and are liable to be affected by the noise from outside and the cross talk noise of proximate lines, thus causing the malfunctioning of the IC chip or the problem that the IC chip does not operate at all. Therefore, it is necessary that the IC chip 110, the bypass capacitor 111 and the elements 112 to 115 added to the high impedance circuit be disposed at locations as proximate as possible to one-another, and the connection thereof must be done with the cross talk noise sufficiently taken into account.
FIG. 15 of the accompanying drawings shows a prior-art BGA package and the surrounding elements described above with reference to FIG. 14 as they are mounted, and a BGA package 120 formed with an IC chip 110 enclosed therein is solder-connected to and mounted on a parent substrate 122 called a mother board through the solder ball portion shown in FIG. 13.
The connection to the surrounding elements is effected by the patterning in the multi-layered mother board 122, and must be done with the problem of cross talk noise or the like fully taken into account.
Also, the aforedescribed multi-layering of the mother board 122 is limited in using the element mounting surface in the connection with the other elements than the above-mentioned surrounding elements from the BGA package terminals of many pins, according to a construction in which as in the aforedescribed example of the prior art, elements are disposed around the BGA package 120, and such a limitation is caused because a digital signal and an analog signal including the aforementioned high impedance portion must be separated from each other as a countermeasure for cross talk, but of course, if the mother board is multi-layered, the cost of the substrate will rise and it will become difficult to adopt BGA in a low-cost product.
Also, to increase the number of layers of the substrate in order to simply take a countermeasure for cross talk noise, or to carry out the countermeasure for cross talk noise by a small number of layers, patterning must be done with a sufficient time spent for consideration, and at any rate, a problem will be left.
Further, there is a method of mounting an intermediate substrate for BGA packaging between BGA and the mother board, and an example thereof is shown in FIG. 16 of the accompanying drawings.
In FIG. 16, the reference numeral 120 designates a BGA package, and this figure shows a mounting method of interposing upper surface electrodes 126, lower surface electrodes 128, through-holes 127 connecting the upper surface electrodes 126 and the lower surface electrodes 128 together, and an intermediate substrate 123 comprised of projected electrodes comprising solder balls 125 and 129 connecting the upper and lower surface electrodes to the outside between a BGA package of the universal type comprised of a wiring substrate 121, electrode lands 124, solder balls 125, etc. and a mother board 122 having electrode lands 130 on the upper surface thereof.
The purpose of using such intermediate substrate is to prevent the warping of the substrate attributable to the mismatching of-the coefficients of thermal expansion of the wiring substrate 121 of the BGA package 120 and the mother board 122 from being created by heat being applied when the BGA package 120 is reflow-mounted on the mother board 122, and the joint strength by the solder balls from being reduced, and as the material of this intermediate substrate, use is made of a material having the approximately medium coefficient of thermal expansion of the coefficients of thermal expansion of the wiring substrate 121 of the BGA package 120 and the mother board 122.
As regards the joint of the substrates, the projected electrodes of the BGA package and the upper surface electrodes 126 of the intermediate substrate 127 are joined together, and the projected electrodes comprising the solder balls 129 added to the lower surface electrodes 128 of the intermediate substrate 127 and the electrodes 130 or lands on the mother board 122 are joined together.
Again in such a mounting system, when the surrounding elements as shown in FIG. 14 are required, the multi-layering of the mother board becomes necessary in order to prevent the influence of the cross talk noise from a digital line on a signal of high impedance, and this leads to an increase in cost and a reduction in the degree of freedom of wiring patterning.
It is an object of the present invention to solve the above-noted disadvantage and to provide a semiconductor package to which a countermeasure for the cross talk noise between the signal lines of a ball grid array is applied.
It is another object of the present invention to divide the signal lines of a ball grid array into a plurality of groups to thereby cast off and pattern them so as to isolate them from one another.
It is still another object of the present invention to provide a land pattern capable of carrying thereon electronic parts discrete from an IC chip in the outer peripheral portion of a wiring substrate except an IC chip enclosing portion.
It is yet still another object of the present invention to provide a land pattern capable of carrying electronic parts thereon on the outer peripheral portion of an intermediate substrate mounted between a semiconductor package and asprinted wiring substrate having the semiconductor package mounted thereon, except the semiconductor package mounting portion.